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Digital circuit design labwork - 4PMSTPD9

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  • Number of hours

    • Laboratory works : 16.0
    ECTS : 1.5

Goals

Discover and practice the design techniques learned during the Harware Modeling and Synthesis lectures.

Design a digital FIR filter and implement it on a prototyping FPGA board.

Contact Laurent FESQUET

Content

  • Simulation of VHDL codes
  • Synthesis
  • Place and Route
  • Prototype on a FPGA board


Prerequisites

Tests

Labwork report



Additional Information

Curriculum->Master TSI SIGMA->Semester 8
Curriculum->Master->Semester 8
Curriculum->SICOM->Semester 8

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Date of update January 9, 2017

Grenoble INP Institut d'ingénierie Univ. Grenoble Alpes