Number of hours
- Lectures 0
- Projects 0
- Tutorials 0
- Internship 0
- Laboratory works 24.0
- Written tests 0
ECTS
ECTS 2.0
Goal(s)
To acquire general engineering knowledge in analog design for transmission systems.
Contact Cyrille CHAVET, Laurent AUBARD, Laurent MONTESContent(s)
1. Oscillators
2. Phase Locked loop (PLL)
3. FM receptor
4. Demodulation AM
5. Automatic gain control
6. Characteristic of TMOS transistor by GPIB
Prerequisites
Test
Session 1:
- Reports and presentations = continuous assessment
- Practical exam
The grade is 40% continuous assessment and 60% final exam
Session 2:
- Practical exam
The grade is 100% final exam
Session 1 :
Si enseignement en présentiel alors
- Rapport et contrôle continu
- Examen de TP
La note est 60% examen terminal, 25% contrôle continu et 15% note de séance
Si enseignement à distance
Rapport et contrôle continu
La note est 100% contrôle continu