Number of hours
- Lectures 20.0
- Projects 0
- Tutorials 20.0
- Internship 0
- Laboratory works 28.0
ECTS
ECTS 3.0
Goal(s)
Contact Regis LEVEUGLE, Mounir BENABDENBI
Content(s)
Prerequisites
Test
Grade computation Session 1
Module Digital architecture (µProc) : N_µP1= 20%CC_µP+80%DS_µP1
Module Optimized hardware architecture : N_opt1= 30%CC_opt+70%DS_opt1
Final grade : 50%N_µP1+50%N_opt1
Grade computation Session 2
Module Digital architecture (µProc) : N_µP2= 20%CC_µP+80%DS_µP2
Module Optimized hardware architecture : N_opt2= 30%CC_opt+70%S2_opt (S2_opt corresponds either to a 1h30 written exam or a 30 minutes oral)
Final grade : 50%N_µP2+50%N_opt2
Additional Information
Course list
Curriculum->Alternance MT->Semester 6
Bibliography
K01-HEN
J. Hennessy, D. Patterson, Computer architecture: a quantitative approach, Morgan Kaufmann, (2nd edition 1996 and 5th edition 2012)
K01-PAT
D. Patterson, J. Hennessy, Organisation et conception des ordinateurs : l'interface matériel/logiciel, Dunod, 1994 (version française)
K04-PAT
D. Patterson, J. Hennessy, Computer organization and design: the hardware/software interface – RISC-V edition, Morgan Kaufmann, 2018