Number of hours
- Lectures 12.0
- Projects 0
- Tutorials 10.0
- Internship 0
- Laboratory works 0
ECTS
ECTS 2.0
Goal(s)
This course aims at giving the basic principles of integrated digital systems design. Their design methodology, implementation targets - more specifically programmable circuits, and architecture of digital systems are introduced.
At the end of this course, students are able to analyze and design a basic digital circuit and to understand the constraints and potentials offered by the integrated technologies.
This course is complemented by the TP Logique PET S2 (3PMETPL6) lab. This lab is required to be able to take the Logics exam.
Contact Sylvain HUETContent(s)
First part: Combinatinal Logic
- Representation of information
- Boolean algebra, representation of logical functions (canonical forms, methods of simplification)
- Basic arithmetic operators (encoding binary integer numbers, addition / subtraction)
Second part: Sequential Logic
- Basic components of sequential logic (flip-flops)
- Basic Circuits (counter, shift register,…)
- Synchronous state machine (graph states, Mealy and Moore models)
- Synthesis of a synchronous state machine (structure, coding states)
- Design by separation into a data path and a control part
Prerequisites
It should be noted that it is essential to have completed the logic lab (3PMETPL6) to take the logic exam.
Session 1 :
- 2 hours exam
- All documents and calculator authorized
- Mark 100% session 1 exam
Session 2 :
- 2 hours exam
- All documents and calculator authorized
- Mark 100% session 2 exam
Confined session 1 :
- 2 hours exam to be done remotely
- All documents and calculator authorized
- Submission of the subject on chamilo at a date and time agreed in advance, submission of the scan of the copy 2 hours later on chamilo.
- Mark 100% confined session 1 exam
Confined session 2 :
- 2 hours written exam to be done remotely
- All documents and calculator authorized
- Submission of the subject on chamilo at a date and time agreed in advance, submission of the scan of the copy 2 hours later on chamilo.
- 15 minutes oral exam with Zoom
- Mark 50% confined session 2 written exam + 50% confined session 2 oral exam
Cf. section evaluation de la description du cours.
[1] Architectures Logicielles et Matérielles,P. Amblard and J.-C. Fernandez and F. Lagnier and F. Maraninchi and P. Sicard and Ph. Waille, Dunod, collection Sciences Sup.,2000.
[2] Electronique Numérique Intégrée, J.-. Danger and S.Guilley and P. Matherat and Y. Mathieu and L. Naviner and A. Polti and J. Provost , cours de l'ENST Paris
[3]Représentation et Synthèse des Systèmes Logiques, S.Pravossoudovitch, Ecole polytechnique Universitaire de Montpellier, 2006
[4] Bebop to the Boolean Boogie: An Unconventional Guide to Electronics Fundamentals, Components and Processes, C. Maxfield and P. Waddell, Butterworth-Heinemann, 2002