Number of hours
- Lectures 8.0
- Projects 0
- Tutorials 0
- Internship 0
- Laboratory works 14.0
- Written tests 0
ECTS
ECTS 2.0
Goal(s)
The aim of this class is to complement the 1A Phelma to prepare the SEOC option. The class is articulated in two parts: the first half gives an introduction to the fundamentals of Information Theory and Networking, inspired by the 1A Ensimag, and the other half is focused on the principles of Digital Design applied to Embedded Systems.
- Fundamentals of Information Theory
- Elements of Networking at the Application Layers, with practical Lab exercises (TP).
- Project on Architecture of Embedded Systems.
Content(s)
- Information Theory: 4h classes (entropy, source coding)
- Networking
-2h classes on Web Applications
- 6h Practical Labs : TP1 (basics, ping, routing, DNS) & TP2 (HTTP & SSL) - Embedded System Design, 12h project for design, simulation en FPGA emulation of a VHDL system based on a MIPS microprocessor
Prerequisites
Test
Evaluation will be done through two Lab Reports, one for each half.
50% pour chaque Compte Rendu
Additional Information
Course list
Curriculum->1Y Core Curriculum->Semester 6
Curriculum->Common courses->Semester 6