Number of hours
- Lectures 6.0
- Projects 0
- Tutorials 0
- Internship 0
- Laboratory works 12.0
- Written tests -
ECTS
ECTS 1.5
Goal(s)
Providing the theoretical and practical notions to understand the different steps of the digital integrated system design flow, with a special focus on aspects related to embedded systems.
Contact Jonathan MIQUEL Responsible(s)
Michele PORTOLAN
Content(s)
After an introduction about the role and importance of integrated digital design in the embedded systemm domain, the course is focused on the design flow: high level specification, RTL langages (VHDL), verification, simulation, synthesis, prototyping and physical design.
The educational purpose is not to train experts on each step, but to give an overview allowing the future engineer to communicate with hardawre design teams or to have the basic knowledge to later deepen some of these aspects.
The theoretical course is complemented by 4 practical work sessions:
- taking on a VHDL project, in several steps and on several examples including a control finite state machine (FSM)
- simulation (with Modelsim) and validation (Spyglass)
- synthesis (Design Vision)
- placement and routing (Innovus)
Prerequisites
Basic notions on digital electronics (logic functions, state machines)
Test
Exam: 1 hour, handwritten notes authorized.
Pactical work report (TP) and on-site participation evaluation.
N1 = 1/2 E1 + 1/2 TP
N2 = 1/2 E2 + 1/2 TP
Parctical work is not catchable.
DS: 1 heure, notes manuscrites autorisées.
Compte Rendu du TP.
N1 = 1/2 E1 + 1/2 TP
N2 = 1/2 E2 + 1/2 TP
TP non rattrapable
Calendar
The course exists in the following branches:
- Curriculum - Embedded Systems & Connect. Devices - Semester 7
Additional Information
Course list
Curriculum->SEOC->Semester 8
Bibliography
Les références seront données lors du cours.