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School of engineering in Physics, Applied Physics, Electronics & Materials
Science
> Studies
Understand basic digital design techniques, using different logic styles, and master some optimization techniques from gate to circuit level.
Contact Regis LEVEUGLEMain characteristics of static CMOS logic
Logic styles : static, pass transistor and dynamic
Arithmetic functions
Latches, flip-flops
Memory blocks
Electrical optimization: transistor sizing, amplification techniques
Processor-like synchronous circuits based on control part and datapath
Combinatorial and sequential logic
2-hour written exam
examen 2h avec documents en session 1
rattrapage remplaçant la note précédente en session 2, oral 30 minutes sans documents
Si confinement :
examen 1h avec oral 20 minutes via Zoom en session 1
mêmes modalités en session 2 via Zoom
Date of update June 27, 2014
3 Parvis Louis Néel - CS 50257 - 38016 Grenoble Cedex 1
