Integrated digital electronics design project - 4PMIPCE2

Goal(s)

Deepen knowledge of Digital Design by following a large-scale project from the initial specification to the final circuit.

Content(s)

The project is centered around a specific component representative of SEOC applications: a Finite Impulse Response (FIR) filter.
The first half of the project focuses on the Front-End: starting from a high-level specification and a provided VHDL codebase (representing the Operative Part), students will specify, implement, and validate a FSM capable of controlling the filter.
In the second half, the filter will go through various Back-End stages (verification, synthesis, and Place & Route) to produce a “mask set” that could be used to fabricate the actual circuit. If time and resources permit, FPGA-based prototyping will also be considered.

Fundamentals of Integrated Digital Electronic Design (Course of S7)