Number of hours
- Lectures 14.0
- Laboratory works 20.0
ECTS
ECTS 3.5
Goal(s)
This lecture aims at introducing the required concepts of testability, robustness and low power, as well as advanced VLSI design concepts.
Contact Mounir BENABDENBIContent(s)
The course will be oriented towards the following aspects :
- Low power VLSI design techniques
- DFM(Y) techniques: problems and solutions
- Fault tolerant design (ECC codes, reconfigurations, etc.)
- DFT design: Scan Path, BIST, Boundary Scan, SOC wrappers for test purposes
- Memory testing and self repair techniques
Prerequisites
Test
report on lab exercises
Examen Ecrit : 50%
Compte rendu de TP : 50%