Phelma Formation 2022

Langage of Material Description - 3PMRLDM4

  • Number of hours

    • Lectures 8.0
    • Projects 0
    • Tutorials 0
    • Internship 0
    • Laboratory works 12.0
    • Written tests 0

    ECTS

    ECTS 1.0

Goal(s)

Understand the need for hardware system modeling and digital design flow
Understand the concepts that characterize a digital material description language
System Verilog Syntax and Semantics for Synthesis

Contact Jonathan MIQUEL

Content(s)

Introduction and motivation of SystemVerilog modeling
Levels of abstraction in digital microelectronics
Verilog System Language for Hardware Modeling
Definition of a subset of the System Verilog synthesizable language
Modelling and synthesis of combinatorial circuits
Modelling and synthesis of state machines
Implementation in TP



Prerequisites

Test

QCMs in continuous monitoring and review (50% )and TP report (50%)
This evaluation method is not modified by a possible confinement and switch to virtual teaching.



examen (50%) et CC (50%)

Additional Information

Course list
Curriculum->Alternance MT->Semester 6