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School of engineering in Physics, Applied Physics, Electronics & Materials
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Our engineering & Master degrees
Our engineering & Master degrees

> Studies

Langage of Material Description - 3PMRLDM4

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  • Number of hours

    • Lectures : 8.0
    • Tutorials : 0
    • Laboratory works : 12.0
    • Projects : 0
    • Internship : 0
    • Written tests : 0
    ECTS : 1.0

Goals

Understand the need for hardware system modeling and digital design flow
Understand the concepts that characterize a digital material description language
System Verilog Syntax and Semantics for Synthesis

Contact Lorena ANGHEL

Content

Introduction and motivation of SystemVerilog modeling
Levels of abstraction in digital microelectronics
Verilog System Language for Hardware Modeling
Definition of a subset of the System Verilog synthesizable language
Modelling and synthesis of combinatorial circuits
Modelling and synthesis of state machines
Implementation in TP



Prerequisites

Tests

QCMs in continuous monitoring and review (50% )and TP report (50%)
This evaluation method is not modified by a possible confinement and switch to virtual teaching.



La note sera calculé: (note TP+note Controle)/2

Additional Information

Curriculum->Alternance MT->Semester 6

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Date of update June 27, 2014

Université Grenoble Alpes