VLSI - ASIC - FPGA - 4PMEEN52

Informations générales

  • Number of hours

    • Lectures 4.0
    • Projects 0
    • Tutorials 0
    • Internship 0
    • Laboratory works 36.0

    ECTS

    ECTS 0.0

Goal(s)

  • Design and implement a digital system based on a Finite Impulse Response (FIR) filter, including its interfaces and verification environment.
  • Apply advanced digital microelectronics design tools and methodologies from RTL design to FPGA prototyping and ASIC implementation.
  • Develop the physical layout of an integrated circuit and understand the associated design constraints.
  • Demonstrate a comprehensive understanding of ASIC and FPGA design flows.
  • Evaluate and validate non-functional properties of complex digital systems, including timing, power, reliability, and security requirements.
Contact Lorena ANGHEL, Katell MORIN ALLORY

Content(s)



Prerequisites

Test

Laboratory Work – 50% Continuous assessment throughout all practical sessions, based on:

  • Oral evaluations conducted by the instructors;
  • Production of technical documentation demonstrating the successful implementation of the digital system, mastery of the design tools, design and validation flow, and advanced hardware description languages;
  • Demonstration of technical competencies and practical skills.

50% written examination



Additional Information

Course list
Curriculum->SEI->Semester 7
Curriculum->Alternance MT->Semester 7