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School of engineering in Physics, Applied Physics, Electronics & Materials
Science
> Studies
Understand basic and advanced digital design techniques, using different logic styles, and master optimization techniques from gate to circuit level.
Contact Regis LEVEUGLEMain characteristics of static CMOS logic
Logic styles : static, pass transistor and dynamic
Arithmetic functions
Latches, flip-flops
Memory blocks
Electrical optimization: transistor sizing, amplification techniques
Processor-like synchronous circuits based on control part and datapath
Combinatorial and sequential logic
2-hour written exam + continuous assessment
examen écrit (2h, avec documents) en session 1
en session 2, rattrapage oral 30 minutes sans documents, remplaçant la note précédente - oral remplacé par un examen écrit sans documents de 1h si trop d'étudiants concernés
Date of update March 13, 2019
3 Parvis Louis Néel - CS 50257 - 38016 Grenoble Cedex 1
