Volumes horaires
- CM 9.0
- Projet 0
- TD 9.0
- Stage 0
- TP 0
Crédits ECTS
Crédits ECTS 1.5
Objectif(s)
Avoir des notions sur l’évolution des architectures des interfaces RF pour les télécommunications, notamment aux gammes de longueur d'ondes millimétriques.
Recevoir des compléments sur les technologies industrielles adaptées à ce contexte. Ce cours de 12 heures est enseigné par des ingénieurs de ST Microelectronics. Il est commun SEI-SyRF et le master WICS.
Contact Florence PODEVIN, Laurent AUBARDContenu(s)
Ce cours est donné en français mais les supports dont le plan du cours sont en anglais
Plan du cours
Context
*Applications
*Design exemple
Technology for mmW IC’s
*Back-end
*Active devices
*Passive devices
Passive for mmW
- Lumped vs distributed integrated passives at mm wave
- Integrated transmission lines performance
**Remindings
**Interest for slow-wave effect
**µstrip, CPW, CPS, S-CPW, S-CPS
**Classical versus slow-wave integrated transmission lines - Miniaturization techniques*
--> Training : Capacitive and stub loading
**Phase inverter
**Meandering
**Flexibility in the design - Wilkinson power divider
**Original Wilkinson power divider
**Modified power divider with access to the isolation resistor
*Hybrid coupler
**Original hybrid coupler
**Ports and branch-lines impedances optimisation
**--> Training : reflection type phase-shifter - Rat-race
**Original rat-race
**Compact rat-race with phase-inverter - Distributed phase-shifters
**Principle
**Application
Active for mmW
- Distributed amplifiers
**Historics
**Principle and interest
- --> Training
- Local oscillator
**Design issues
**Layout Issues
- --> Training
- Matching Issues
**Inter stages matching
**50? Output Buffers
- --> Training
Prérequis
4PMRCRI6 Circuits Radiofréquences Intégrés
4PMRPDC5 Passifs distribués et circuits actifs en hyperfréquences
Contrôle des connaissances
Calculatrice autorisée
Documents autorisés : uniquement 1 feuille RV manuscrite
En présentiel
SESSION NORMALE :
Types d'évaluation (examen écrit, oral, CC, TP, Rapport, ...) : examen écrit, TP
*Session 1 : 80% note DS écrit de 2h (en présentiel) + 20% note contrôle continu des intervenants industriels (en présentiel)*
*Session 2 : 80% remplacement de la note du DS par un oral (en présentiel) + 20% note contrôle continu des intervenants industriels (en présentiel)*
*Évaluation rattrapable :*
Type d'évaluation : examen écrit session 1
Durée : 2h
Documents autorisés : 1 feuille RV manuscrite
Documents interdits : tout le reste
Matériels spécifiques autorisés :
Calculatrice : oui
Possible en distanciel : non
*Évaluation non rattrapable :*
Type d'évaluation : CC des intervenants industriels
Durée : de l'ordre de 20 minutes en fin d'intervention sous forme de QCM surveillé par l'intervenant
Modalités : avec ou sans les supports suivant les intervenants
Bibliographie
[1] “Inductance Calculations” , F. W. Grover, Dover Publications, 2004 .
[2] A. Bautista et al, “Recent advances of CMOS/BiCMOS tunable circuits for mm-wave application” , 45th European Microwave Conference, Worshop 03, Technologies overview for mm-wave tunable circuits, Paris, France, 6 Sept 2015., 2004 .
[3] [MAN-2006] A. M. Mangan, et al, “De-embedding transmission line measurements for accurate modeling of IC designs,” IEEE TED, vol. 53, no. 2, pp. 235-241, Feb. 2006.
[4] [QUE-2010] T. Quemerais , et al, “65-, 45-, and 32-nm Aluminium and Copper Transmission-Line Model at Millimeter-Wave Frequencies,” IEEE T-MTT, vol. 58, no. 9, pp. 2426-2433, Sept. 2010.
[5] [CAT-2007] A. Cathelin , et al, “Design for millimeter-wave applications in silicon technologies,” in Proc. 33rd Eur. SSCC., Munich, Germany, 11-13 Sept. 2007, pp. 464-471.
[6] [AVE-2008] G. Avenier , et al, “0.13 µm SiGe BiCMOS technology for mm-wave applications,” in 2008 Bipolar/BiCMOS Circuits and Technology Meeting, Monteray, CA, USA, 13-15 Oct. 2008, pp. 89–92.
[7] [GIA-2007] F. Gianesello , et al, “1.8 dB insertion loss 200 GHz CPW band pass filter integrated in HR SOI CMOS Technology,” in Proc. IMS., Honolulu, HI, USA, 3-8 Jun 2007, pp. 453-456.
[8] [PEL-2008] S. Pellerano , et al, “A 64 GHz LNA With 15.5 dB Gain and 6.5 dB NF in 90 nm CMOS,” IEEE JSSC, vol. 43, no 7, pp. 1542?1552, July. 2008.
[SIL-2007] A. Siligaris , et al, “CPW and discontinuities modeling for circuit design up to 110 GHz in SOI CMOS technology,” in Proc. 2007 RFIC Symposium, Honolulu, HI, USA, 3-5 Jun 2007, pp. 295 - 298.
[9] [VEC-2009] F. Vecchi , et al, “Design of Low-Loss Transmission Lines in Scaled CMOS by Accurate Electromagnetic Simulations,” IEEE JSSC, vol. 44, no. 9, pp. 2605-2615, Sept. 2009.
[10][LAI-2007] I. C. H. Lai et al, “High-Q Slow-Wave Transmission Line for Chip Area Reduction on Advanced CMOS Processes,” in Proc. IEEE Int. Conf. on Microelectronic Test Structures, Tokyo, Japan, 19-22 March 2007, pp. 192-195.
[11][LEE-2010] J. J. Lee et al, “A Slow-Wave Microstrip Line With a High-Q and a High Dielectric Constant for Millimeter-Wave CMOS Application,” IEEE Microw. Wireless Compon. Lett, vol. 20, no. 7, pp. 381-383, July 2010.
[12] D. Kaddour et al, “High-Q Slow-Wave Coplanar Transmission lines on 0.35-µm CMOS Process,” IEEE Microw. Wireless Compon. Lett, vol.19, no.9, pp.542-544, Sept. 2009.
[13] A.-L. Franc et al, “Compact high-Q, low-loss mmW transmission lines and power splitters in RF CMOS technology,” in Proc. Int. Microwave Symp., Baltimore, MD, United States, June 2011.
[14] J. Wu, “Microstrip Power Divider with Capacitive Stubs Loading for Miniaturisation and Harmonic Suppression,” Microwave Technology Computational Electromagnetics (ICMTCE), 2011 IEEE International Conference on, pp. 237-239, 2011.
[15] M. H. Awida et al, “Compact rat-race hybrid coupler using meander space-filling curves,” Microw. Opt. Technol. Lett., vol. 48, no. 3, pp. 606-609, March 2006.
[16] E. J. Wilkinson, “An N-way Hybrid Power Divider,” IRE Transactions on Microwave Theory and Techniques, vol. 8, no. 1, pp. 116-118, Jan. 1960.
[17] D. Pozar, Microwave engeneering, 4th edition.
[18] S. Horst et al, “Modified Wilkinson Power Dividers for Millimeter-Wave Integrated Circuits,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 11, 2439-2446, Nov 2007.
[19] F. Burdin et al, “Flexible and Miniaturized Power Divider,” International Journal on Microwave and Wireless Technologies, , Online Publication, N° 3, March 2015.
[20] M. K. Mandal et al, “Reduced-Length Rat-Race Couplers,” IEEE Trans. Microw. Theory Techn., Vol. 55, no. 12, pp. 2593-2998, Dec. 2007.
[21] F. Burdin et al, “Millimeter-Wave Rat-Race Balun in a CMOS 65 nm Technology with Slow-Wave Transmission lines and innovative topology,” 32nd Progress In Electromagnetics Research Symposium, PIERS 2012, Moscow, 19-23 August, 2012.
[22] H.-R. Ahn et al, “Arbitrary power division branch-line hybrid terminated by arbitrary impedances,” Electron. Lett., Vol. 35, no. 7, pp. 572-574, April 1999.
[23] T. La Rocca et al, “Millimeter-Wave CMOS Digital Controlled Artificial Dielectric Differential Mode Transmission Lines for Reconfigurable ICs,” in Proc. Int. Microwave Symp., Atlanta, GA, United States, June 2008.
[24] T. La Rocca et al, “60 GHz CMOS Amplifiers Using Transformer-Coupling and Artificial Dielectric Differential Transmission Lines for Compact Design,” IEEE Journal on Solid States Circuits, Vol. 44, no. 5, May 2009.
[25] W. S. Percival, “Thermionic valve circuits,” British Patent 460,562, filed July 24, 1936, granted Jan. 29, 1937.
[26] E. Ginzton, W. Hewlett, J. Jasberg, J. Noe, “Distributed Amplification,” Proceedings of the IRE, Vol. 36, no 8, pp. 956-969, Aug. 1948.
[27] C. Zech et al., “An Ultra-Broadband Low-Noise Traveling-Wave Amplifier Based on 50nm InGaAs mHEMT Technology,” 7th German Microwave Conference, GeMiC, 2012.
[28] D. Fritsche et al., “A trimmable cascaded distributed amplifier with 1,6 THz Gain-Frequency product,” IEEE Transactions on Terahertz Science and Technologie, 14th Oct. 2015.